Magnetic memory devices described in US 2004/0251232 and U.S. Pat. No. 7,626,844 comprise magnetic shift registers in the form of nanowire racetrack memories which rely on propagation of magnetic domain walls to store data. The position of the domain walls is used to signify different data states and for magnetic shift registers it is important to be able to move the domain walls in a precise and reproducible manner. It is difficult to tell accurately how far a domain wall has moved and so the prior art discloses the use of pinning sites to allow the movement of the domain walls to be controlled and defined in response to current pulses. US 2004/0251232 discloses the use of notches in ferromagnetic nanowires to act as pinning sites for domain walls and U.S. Pat. No. 7,710,769 also discloses use of notches in nanowires to create such domain wall traps. However there are significant issues to be overcome with getting such pinning sites to work within these devices, see in particular, Stuart S. P. Parkin et al, Magnetic Domain-Wall Racetrack Memory, Science 320, 190 (2008) as movement of domain walls between the notches is not consistent. Further, racetrack memories with notched wires are time-consuming and expensive to make.